EPOX EP-6VBA Uživatelský manuál Strana 53

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A-5
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B B
B
B-1B-1
B-1B-1
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POST CODESPOST CODES
POST CODESPOST CODES
POST CODES
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(Debug Card)(Debug Card)
(Debug Card)(Debug Card)
(Debug Card)
ISA POST codes are typically output to I/O port address 80h.
POST (hex)POST (hex)
POST (hex)POST (hex)
POST (hex)
DESCRIPTIONDESCRIPTION
DESCRIPTIONDESCRIPTION
DESCRIPTION
01-02 Reserved.
C0 Turn off OEM specific cache, shadow.
03 1. Initialize EISA registers (EISA BIOS only)C
2. Initialize all the standard devices with
default values Standard devices includes.
- DMA controller (8237)C
- Programmable Interrupt Controller (8259)C
- Programmable Interval Timer (8254)C
- RTC chip.
04 Reserved
05 1. Keyboard Controller Self-Test.
06 2. Enable Keyboard Interface.
07 Reserved.
08 Verifies CMOS's basic R/W functionality.
C1 Auto-detection of onboard DRAM & Cache.
C5 Copy the BIOS from ROM into E0000-FFFFF
shadow RAM so that POST will go faster.
08 Test the first 256K DRAM.
09 OEM specific cache initialization. (if needed)
0A 1. Initialize the first 32 interrupt vectors
with corresponding Interrupt handlers.
Initialize INT numbers from 33-120 with
Dummy (Spurious) Interrupt Handler.
2. Issue CPUID instruction to identify CPU
type.
3. Early Power Management initialization.
(OEM specific)
0B 1. Verify the RTC time is valid or not.
2. Detect bad battery.
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